PostDoc (Electronics and Communication), Polytechnic University of Turin, Italy, 2024

PhD (Electrical, Electronics and Communication), Polytechnic University of Turin, Italy, 2023

MS (Computer Engineering), Polytechnic University of Turin, Italy, 2019

BE (Computer System Engineering), Hamdard University, Karachi, 2014

Dr. Nasir Ali Shah is an Assistant Professor in the Department of Electrical Engineering at FAST NUCES, Islamabad. He holds a Ph.D. in Electrical, Electronics and Communications Engineering from Politecnico di Torino, Italy (2023), where his doctoral research focused on heterogeneous hardware acceleration for 5G New Radio channel modelling using FPGAs and GPUs.

Dr. Shah brings over five years of research and development experience in hardware acceleration for wireless communication systems, spanning FPGA, GPU, and ASIC platforms. His work covers 5G physical layer functions, including 3GPP channel modelling, LDPC coding, OFDM processing, channel estimation, and equalization. He has published in leading IEEE journals and has co-supervised multiple M.Sc. thesis projects on FPGA-based hardware acceleration.

At NUCES Islamabad, Dr. Shah teaches Computer Architecture and Research Methodology. He is committed to bridging rigorous academic instruction with cutting-edge research, equipping students with both theoretical foundations and hands-on engineering skills relevant to modern computing and communication systems.